The mainstream of conventional digital/analog converter circuits has been a type in which a reference voltage generation circuit using a resistance divider circuit generates a plurality of reference voltages corresponding to the bit precision of digital data, a selector selects a reference voltage, among the plurality of reference voltages, corresponding to the digital value of digital data, and the selected reference voltage is supplied to a buffer. In this type, however, with enhancement of the bit precision, the circuit scale of the selector increases exponentially. It is therefore difficult to reduce the circuit area of a high-definition driver. In particular, a liquid crystal driver, which is required to achieve reduction in circuit area as well as high definition and high gradation, has found difficulty in implementing these requirements simultaneously.
To overcome the above problem, Japanese Laid-Open Patent Publication No. 3235121 (Patent Document 1) gives the bit resolution along, not only the voltage axis, but also the time axis to reduce the circuit scale of the selector. To state more specifically, a step voltage whose value changes stepwise is supplied to each of a plurality of reference voltage lines, a sampling switch circuit selects a step voltage, among the plurality of step voltages supplied to the plurality of reference voltage lines, corresponding to the digital value of the most significant bits of digital data, the selected step voltage is accumulated in a hold capacitor, and the accumulated voltage is amplified with an output amplifier and outputted.    Patent Document 1: Japanese Laid-Open Patent Publication No. 3235121